Design-Reuse

A custom RISC-V vector instruction to accelerate structured-sparse matrix multiplications

A novel AI-acceleration paper presents a method to optimize sparse matrix multiplication for machine learning models, particularly focusing on structured sparsity. Structured sparsity involves a ...
Semiconductor Engineering

SparseP: Towards Efficient Sparse Matrix Vector Multiplication on Real Processing-In-Memory Systems

“Several manufacturers have already started to commercialize near-bank Processing-In-Memory (PIM) architectures. Near-bank PIM architectures place simple cores close to DRAM banks and can yield ...
Ars Technica

Researchers upend AI status quo by eliminating matrix multiplication in LLMs

Researchers claim to have developed a new way to run AI language models more efficiently by eliminating matrix multiplication from the process. This fundamentally redesigns neural network operations ...
Business Wire

SiFive’s New RISC-V IP Combines Scalar, Vector and Matrix Compute to Accelerate AI from the Far Edge IoT to the Data Center

SANTA CLARA, Calif.--(BUSINESS WIRE)--Further expanding SiFive’s lead in RISC-V AI IP, the company today launched its 2nd Generation Intelligence™ family, featuring five new RISC-V-based products ...
JSTOR Daily

PERTURBATION ANALYSIS OF THE EIGENVECTOR MATRIX AND SINGULAR VECTOR MATRICES

Abstract Let A be an n × n Hermitian matrix and A = UΛUH be its spectral decomposition, where U is a unitary matrix of order n and Λ is a diagonal matrix. In this note we present the perturbation ...