Electronic Design

SoC Design Methodology Harmonizes Digital, Analog, Power

Exploiting a dramatic improvement in the digital density of its super-smart power technology, SMARTMOS, Motorola's Semiconductor Products Sector (SPS) has created a design platform for complex ...
EDN

Moving Towards a New SOC System-Design Methodology

Last week, I wrote several blog entries that discussed old and obsolete ideas contained in the popular and successful Reuse Methodology Manual (the RMM), which ushered in the SOC era back in 1997. I ...
Embedded

Dealing with SoC hardware/software design complexity with scalable verification methods

The problem with today's existing methodologies is that verification issubservient to design. This principle requires a shift in paradigm,especially in designing complex electronic systems. Why?
Semiconductor Engineering

FMEDA-Driven SoC Design Of Safety-Critical Semiconductors

As state-of-the-art electronics propel the automotive, industrial, and aerospace industry into a future of more connectivity and autonomy, the development of safety-compliant semiconductors is ...
Semiconductor Engineering

Leaning Into The SoC Power Methodology

As inflation skyrockets and the price of everything increases seemingly by the hour, finding ways to trim time and costs are more valuable than ever. Lean manufacturing was introduced by the Toyota ...
Electronic Design

DFT Propels SoC IC Testing

The Design-for-Test (DFT) methodology is a strong driving force in the cost-effective testing of large-volume commodity items with very short life cycles, like system-on-chip (SoC) devices. It will ...
Embedded

Reducing signoff corners to achieve faster 40 nm SOC design closure

In the race to achieve high design performance and stringent power requirements, the VLSI world is moving quickly down the scaling curve to process technologies that ...