Embedded

Moving from FPGA to ASIC for your AI chip? Here’s what you should know

Perhaps you are designing an embedded inference engine for edge computing. Or you are taking the next step in automotive vision processing. Or maybe you have an insight that can challenge Nvidia and ...
EDN

ASIC-FPGA high wire act

Remember when ASIC was ASIC and FPGA was an afterthought? It wasn't that long ago–maybe 10 years–but technology and market forces have done a lot to blur the distinction. Where there had been a clear ...
EDN

ASICs, FPGAs vie in competitive high wire act

The following article was contributed by Crista Souza, senior editor of Electronics Supply & Manufacturing, a monthly print magazine published by CMP Media. CMP Media also publishes Silicon Strategies ...
Digi Times

FPGA vs ASIC: Altera CEO highlights FPGA's advantage in AI era

Embedded World 2025 officially commenced this week in Nuremberg, Germany, with Sandra Rivera, CEO of FPGA company Altera, delivering the keynote address. In her presentation, Rivera discussed key ...
AV Network

Justin Kennington on AV Supply Chain Using FPGA vs. ASIC Chips

SDVoE Alliance President, Justin Kennington shares his perspective on how FPGA versus ASIC chips impacts the product supply chain in the AV industry. When you purchase through links on our site, we ...
Electronic Design

ASIC-Style Synthesis Embarks On FPGA World

With as many as 40% of ASIC and ASSP designers doing FPGA prototyping, Synopsys decided to spin a version of its Design Compiler (DC) synthesis tool for FPGA designers. The new tool, dubbed DC FPGA, ...
Business Wire

Faraday Unveiled FPGA-Go-ASIC Prototyping Platform to Accelerate FPGA-to-ASIC Conversion

HSINCHU, Taiwan--(BUSINESS WIRE)--Faraday Technology Corporation (TWSE: 3035), a leading ASIC design service and IP provider, today unveiled its FPGA-Go-ASIC™ prototyping platform solution. This ...
Digi Times

Lattice confident in FPGA competitiveness against ASIC

US-based FPGA maker Lattice Semiconductor held its annual Developers Conference this week, during which the company announced its latest Nexus 2 platform and expansions to its mid-range Avant platform ...
Business Wire

Aldec Launches HES-DVM Proto ‘Cloud Edition’ - Giving Engineers Easier Access to FPGA-based ASIC & SoC Prototyping

HENDERSON, Nev.--(BUSINESS WIRE)--Aldec, Inc., a pioneer in mixed HDL language simulation and hardware-assisted verification for FPGA and ASIC designs, has launched HES-DVM Proto Cloud Edition (CE).
Forbes

The Evolution Of Programmable Hardware At Xilinx

This voice experience is generated by AI. Learn more. This voice experience is generated by AI. Learn more. I recently participated in an event that unveiled a new IEEE milestone for the field ...
BizTech

What Is an FPGA? Understanding Field-Programmable Gate Arrays

Ernie Smith is a former contributor to BizTech, an old-school blogger who specializes in side projects, and a tech history nut who researches vintage operating systems for fun. When it comes to major ...